• CPU configuration

• 1Kx13 bits on chip ROM
• 48×8 bits on-chip registers (SRAM, General purpose)
• 5-level stacks for subroutine nesting
• 4 programmable level voltage detector LVD : 4.5, 4.0, 3.3, 2.2V
• 3 programmable level voltage reset LVR : 4.0, 3.5, 2.7V
• Less than 1.5mA at 5V/4MHz
• Typically 15 μA, at 3V/32kHz
• Typically 1 μA, during Sleep mode

• I/O port configuration

• 3 bidirectional I/O ports : P5, P6, P7
• 18 I/O pins
• Wake-up port : P6
• 7 Programmable pull-down I/O pins
• 8 programmable pull-high I/O pins
• 8 programmable open-drain I/O pins
• External interrupt with wake-up : P60

• Operating voltage range:

• 2.1V~5.5V at 0~70°C (Commercial)
• 2.3V~5.5V at -40~85°C (Industrial)

• Operating frequency range (base on 2 clocks):    

• Crystal mode: 

DC~20MHz/2clks @ 5V

DC~8MHz/2clks @ 3V

DC~4MHz/2clks @ 2.1V

• ERC mode: 

DC~2 MHz/2clks @ 2.1V

• IRC mode: 

Internal RC Frequency	Drift Rate
	Temperature(-40°C~85°C)	Voltage(2.1V~5.5V)	Process	Total
4MHz	±2%	±3%	±2%	±7%
16MHz	±2%	±3%	±2%	±7%
8MHz	±2%	±3%	±2%	±7%
1MHz	±2%	±3%	±2%	±7%

• Peripheral configuration

• 8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and overflow interrupt
• External interrupt input pin
• 2/4 clocks per instruction cycle selected by code option
• Power down (Sleep) mode
• High EFT immunity 

• Four available interrupts

• TCC overflow interrupt
• Input-port status changed interrupt
• External interrupt
• Low voltage detect interrupt

• Special Features

• Programmable free running watchdog timer
• Power-on voltage detector available (1.8~1.9V)
• Selectable Oscillation mode

• Package Type:  

• 20-pin SSOP 209mil : EM78P176NSS20J/S
• 20-pin SOP 300mil : EM78P176NSO20J/S
• 18-pin DIP 300mil : EM78P176ND18J/S
• 18-pin SOP 300mil : EM78P176NSO18J/S
• 10-pin SSOP 150mil : EM78P176NSS10J/S
• 10-pin MSOP 118mil : EM78P176NMS10J/S

Note: Green products do not contain hazardous .substances.

芯片手册下载:
     EM78P176N芯片数据手册